Matching Properties of Deep Sub-Micron MOS Transistors examines this interesting phenomenon. Microscopic fluctuations cause shastic parameter fluctuations that affect the accuracy of the MOSFET. For analog circuits this determines the trade-off between speed, power, accuracy and yield. Furthermore, due to the down-scaling of device dimensions, transistor mismatch has an increasing impact on digital circuits. The matching properties of MOSFETs are studied at several levels of abstraction:
A simple and physics-based model is presented that accurately describes the mismatch in the drain current. The model is illustrated by dimensioning the unit current cell of a current-steering D/A converter.
The most commonly used methods to extract the matching properties of a technology are bench-marked with respect to model accuracy, measurement accuracy and speed, and physical contents of the extracted parameters.
The physical origins of microscopic fluctuations and how they affect MOSFET operation are investigated. This leads to a refinement of the generally applied 1/area law. In addition, the analysis of simple transistor models highlights the physical mechanisms that dominate the fluctuations in the drain current and transconductance.
The impact of process parameters on the matching properties is discussed.
The impact of gate line-edge roughness is investigated, which is considered to be one of the roadblocks to the further down-scaling of the MOS transistor.
Matching Properties of Deep Sub-Micron MOS Transistors is aimed at device physicists, characterization engineers, technology designers, circuit designers, or anybody else interested in the shastic properties of the MOSFET.